RSFQ-Asynchronous Timing (RSFQ-AT): A new design methodology for implementation in CAD automation
dc.contributor.author | Gerber H.R. | |
dc.contributor.author | Fourie C.J. | |
dc.contributor.author | Perold W.J. | |
dc.date.accessioned | 2011-05-15T16:01:43Z | |
dc.date.available | 2011-05-15T16:01:43Z | |
dc.date.issued | 2005 | |
dc.description.abstract | Asynchronous timing is very important in the design of large-scale ultra-high speed superconducting digital electronic (SDE) circuits. This paper presents an optimized asynchronous self-timing scheme that will simplify and speed up the design of large digital circuits. Rapid Single Flux Quantum Asynchronous Timing (RSFQ-AT) is compared to other timing schemes by implementing, testing and evaluating a variety of circuits. Further it is shown how the design methodology introduced with this asynchronous self-timing scheme can simplify the design of automated CAD tools for RSFQ-AT. © 2005 IEEE. | |
dc.description.version | Conference Paper | |
dc.identifier.citation | IEEE Transactions on Applied Superconductivity | |
dc.identifier.citation | 15 | |
dc.identifier.citation | 2 PART I | |
dc.identifier.issn | 10518223 | |
dc.identifier.other | 10.1109/TASC.2005.849787 | |
dc.identifier.uri | http://hdl.handle.net/10019.1/12117 | |
dc.subject | Asynchronous sequential logic | |
dc.subject | Automation | |
dc.subject | Digital circuits | |
dc.subject | Digital signal processing | |
dc.subject | Logic design | |
dc.subject | Superconducting devices | |
dc.subject | Time division multiplexing | |
dc.subject | Timing circuits | |
dc.subject | VLSI circuits | |
dc.subject | Asynchronous timing | |
dc.subject | Dual encoding hierarchical pipelining (DEHP) | |
dc.subject | RSFQ | |
dc.subject | Superconducting electronics | |
dc.subject | Computer aided design | |
dc.title | RSFQ-Asynchronous Timing (RSFQ-AT): A new design methodology for implementation in CAD automation | |
dc.type | Conference Paper |