The design of a high-performance, floating-point embedded system for speech recognition and audio research purposes

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dc.contributor.advisorNiesler, T. R.
dc.contributor.advisorSmit, W.
dc.contributor.authorDuckitt, Williamen_ZA
dc.contributor.otherStellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.
dc.date.accessioned2008-06-12T08:33:29Zen_ZA
dc.date.accessioned2010-06-01T08:38:51Z
dc.date.available2008-06-12T08:33:29Zen_ZA
dc.date.available2010-06-01T08:38:51Z
dc.date.issued2008-03en_ZA
dc.descriptionThesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2008.
dc.description.abstractThis thesis describes the design of a high performance, floating-point, standalone embedded system that is appropriate for speech and audio processing purposes. The system successfully employs the Analog Devices TigerSHARC TS201 600MHz floating point digital signal processor as a CPU, and includes 512MB RAM, a Compact Flash storage card interface as non-volatile memory, a multi-channel audio input and output system with two programmable microphone preamplifiers offering up to 65dB gain, a USB interface, a LCD display and a push-button user interface. An Altera Cyclone II FPGA is used to interface the CPU with the various peripheral components. The FIFO buffers within the FPGA allow bulk DMA transfers of audio data for minimal processor delays. Similar approaches are taken for communication with the USB interface, the Compact Flash storage card and the LCD display. A logic analyzer interface allows system debugging via the FPGA. This interface can also in future be used to interface to additional components. The power distribution required a total of 11 different supplies to be provided with a total consumption of 16.8W. A 6 layer PCB incorporating 4 signal layers, a power plane and ground plane was designed for the final prototype. All system components were verified to be operating correctly by means of appropriate testing software, and the computational performance was measured by repeated calculation of a multi-dimensional Gaussian log-probability and found to be comparable with an Intel 1.8GHz Core2Duo processor. The design can therefore be considered a success, and the prototype is ready for development of suitable speech or audio processing software.en_ZA
dc.identifier.urihttp://hdl.handle.net/10019.1/2014
dc.language.isoenen_ZA
dc.publisherStellenbosch : Stellenbosch University
dc.rights.holderStellenbosch University
dc.subjectAutomatic speech recognitionen_ZA
dc.subjectSpeech processing systemsen_ZA
dc.subjectDissertations -- Electronic engineeringen_ZA
dc.subjectTheses -- Electronic engineeringen_ZA
dc.subject.otherElectrical and Electronic Engineeringen_ZA
dc.titleThe design of a high-performance, floating-point embedded system for speech recognition and audio research purposesen_ZA
dc.typeThesisen_ZA
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