Experimental demonstration of complementary output switching logic approaching 10 gb/s clock frequencies
dc.contributor.author | Jeffery M. | |
dc.contributor.author | Perold W. | |
dc.contributor.author | Van Duzer T. | |
dc.date.accessioned | 2011-05-15T16:01:44Z | |
dc.date.available | 2011-05-15T16:01:44Z | |
dc.date.issued | 1997 | |
dc.description.abstract | Abstract-'We have proposed a new type of voltage-state logic called Complementary Output Switching Logic (COSL). The COSL circuits were optimized for 5 - 10 GHz operation using a Monte Carlo method. Here we present experimental test results of the basic COSL gates in the frequency range 1-10 GHz and discuss bit error rate measurements at 2 - 5 Gb/s. © 1997 IEEE. | |
dc.description.version | Article | |
dc.identifier.citation | IEEE Transactions on Applied Superconductivity | |
dc.identifier.citation | 7 | |
dc.identifier.citation | 2 PART 3 | |
dc.identifier.issn | 10518223 | |
dc.identifier.uri | http://hdl.handle.net/10019.1/12127 | |
dc.subject | Bit error rate | |
dc.subject | Electric current control | |
dc.subject | Error compensation | |
dc.subject | Josephson junction devices | |
dc.subject | Logic circuits | |
dc.subject | Monte Carlo methods | |
dc.subject | SQUIDs | |
dc.subject | Switching functions | |
dc.subject | Complementary output switching logic (COSL) | |
dc.subject | Voltage state logic | |
dc.subject | Logic gates | |
dc.title | Experimental demonstration of complementary output switching logic approaching 10 gb/s clock frequencies | |
dc.type | Article |