RSFQ digital circuit design automation and optimisation

dc.contributor.advisorFourie, Coenraden
dc.contributor.authorMuller, Louis C.en
dc.contributor.otherStellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.en_ZA
dc.date.accessioned2015-05-20T09:27:37Z
dc.date.available2015-05-20T09:27:37Z
dc.date.issued2015-03en
dc.descriptionThesis (PhD)--Stellenbosch University, 2015.en_ZA
dc.description.abstractENGLISH ABSTRACT: In order to facilitate the creation of complex and robust RSFQ digital logic circuits an extensive library of electronic design automation (EDA) tools is a necessity. It is the aim of this work to introduce various methods to improve the current state of EDA in RSFQ circuit design. Firstly, Monte Carlo methods such as Latin Hypercube sampling and Sobol sequences are applied for their variance reduction abilities in approximating circuit yield. In addition, artificial neural networks are also investigated for their applicability in modeling the parameter-yield space. Secondly, a novel technique for circuit functional testing using automated state machine extraction is presented, which greatly simplifies the logical verification of a circuit. This method is also used, along with critical timing extraction, to automatically generate Hardware Description Language(HDL) models which can be used for high level circuit design. Lastly, the Greedy Local search, Simulated Annealing and Genetic Algorithm meta-heuristics were statistically compared in a novel manner using a yield model provided by artificial neural networks. This is done to ascertain their performance in optimising RSFQ circuits in relation to yield. The variance reduction techniques of Latin Hypercube Sampling and Sobol sequences were shown to be beneficial for the use with RSFQ circuits. For optimisation purposes the use of Simulated Annealing and Genetic Algorithms were shown to improve circuit optimisation for possible multi-modal search spaces. An HDL model is also successfully generated from a complex RSFQ circuit for use in high level circuit design which includes critical timing and propagation latency. All the techniques presented in this study form part of a software library that can be further refined and extended in future work.en_ZA
dc.format.extent151 pages : illustrationsen_ZA
dc.identifier.urihttp://hdl.handle.net/10019.1/96808
dc.language.isoen_ZAen_ZA
dc.publisherStellenbosch : Stellenbosch Universityen_ZA
dc.rights.holderStellenbosch Universityen_ZA
dc.subjectRSFQ digital circuit design -- Automationen_ZA
dc.subjectRapid Single Flux Quantum (RSFQ)en_ZA
dc.subjectRSFQ digital circuit design -- Optimisationen_ZA
dc.subjectUCTDen_ZA
dc.titleRSFQ digital circuit design automation and optimisationen_ZA
dc.typeThesisen_ZA
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