Towards a complete logic description of cell libraries for use in large scale circuit design
dc.contributor.author | Gerber HR | |
dc.contributor.author | Fourie CJ | |
dc.contributor.author | Perold WJ | |
dc.date.accessioned | 2012-08-10T20:37:09Z | |
dc.date.available | 2012-08-10T20:37:09Z | |
dc.date.issued | 2007 | |
dc.description | Please help us populate SUNScholar with the post print version of this article. It can be e-mailed to: scholar@sun.ac.za | |
dc.description | Ingenieurswese | |
dc.description | Elektriese En Elektroniese Ingenie | |
dc.identifier.uri | http://hdl.handle.net/10019.1/43454 | |
dc.title | Towards a complete logic description of cell libraries for use in large scale circuit design | |
dc.type | Proceedings International |