Browsing by Author "Herbst, Heinrich"
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- ItemGate-level superconductor integrated circuit fabrication process modelling for improved layout extraction(Stellenbosch : Stellenbosch University, 2021., 2021-03) Herbst, Heinrich; Fourie, Coenrad; Stellenbosch University. Faculty of Engineering. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.ENGLISH ABSTRACT: This thesis presents the development of a fabrication process modelling tool called Katana, created to aid in parameter extraction of superconducting electronic (SCE) integrated circuit (IC) layouts. The program forms part of a toolchain for the development of superconducting technology-based computers. The thesis begins with an overview of the fabrication process of SCE ICs, following which the implementation of Katana is discussed in two chapters. The first chapter on implementation describes a module which generates twodimensional circuit cross-sections when provided with the mask layout and fabrication process data. The module also assists with manual 3D modelling of circuit elements using strategic slices from the University of Florida’s process modelling tool, FLOOXS. The next chapter describes the implementation of an automated, three-dimensional SCE logic-gate modelling module. The module is capable of automatically generating process-modelled circuit representations which can be meshed and fed into finite-element parameter extraction software. The thesis reviews the functionality of the program by generating and analyzing models of Rapid Single Flux Quantum- (RSFQ-)- based superconducting circuit logic gates and confirms the necessity of process modelling through a discussion on how the enhanced models affect parameter extraction. Additionally, the thesis shows that researchers are already using Katana for improved thermal analysis and current density simulation. The concluding section discusses potential further research in future.