Browsing by Author "Coetzee, Johannes"

Now showing 1 - 1 of 1
  • Thumbnail Image
    Item
    A physical design and layout versus schematic framework for superconducting electronics
    (Stellenbosch : Stellenbosch University, 2021-03) Coetzee, Johannes; Fourie, Coenrad; Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.
    ENGLISH ABSTRACT: This dissertation presents a PCell synthesis and layout vs schematic extraction framework, named SPiRA. This framework allows the user to create a PCell-based layout, creating parameters to adjust polygon positions, sizes and presence. All polygons are connected to a specific layer in the fabrication process by means of a suggested Rule Deck Database containing process information. During the creation of a PCell, an undirected graph or node graph, showing all the interconnections present in the layout, is generated. Furthermore a SPICE-like netlist (a list containing information about the elements contained in the circuit and how element ports are connected) is generated by parsing this node network allowing the user to see if the extracted elements match up with the initial design. SPiRA is a Python framework, allowing for dynamicity in the creation of the layout, giving the user feedback along the way. Design rule checking (DRC) is implemented by means of different parameter types, allowing the user to get feedback during the creation of the layout about broken design rules. Further, full post-layout DRC is implemented by means of the KLayout DRC engine. As a futher extension of the framework, SPiRA-tools is introduced. This collection of tools allows the user to modify a layout, to prepare it for simulation by means of the InductEx simulation engine. SPiRA-tools also brings to life a schematic generator, that reads in a netlist file to produce a Standard Vector Graphics schematic, allowing the user to visually compare initial design, with the newly generated output allowing for true Layout vs Schematic comparison.