Monte Carlo optimization of superconducting complementary output switching logic circuits

dc.contributor.authorJeffery M.
dc.contributor.authorPerold W.J.
dc.contributor.authorWang Z.
dc.contributor.authorVan Duzer T.
dc.date.accessioned2011-05-15T16:01:44Z
dc.date.available2011-05-15T16:01:44Z
dc.date.issued1998
dc.description.abstractThe authors have previously proposed a new superconducting voltage-state logic family called complementary output switching logic (COSL). This logic family has been designed using a Monte Carlo optimization process such that circuits have a high theoretical yield at 5-10 Gb/s clock speeds in spite of existing Josephson process variations. In the present work the Monte Carlo optimization process is described and theoretical yields are calculated for the COSL 2- and 3-bit encoder circuits. The circuit simulations use 5-10-GHz sinusoidal clocks and measured global and local process variations. The 2-bit encoder results are compared to modified variable threshold logic (MVTL) circuits and demonstrate that COSL circuits should have a significantly higher theoretical yield than MVTL at 10 Gb/s. Design rules for optimal COSL circuit layouts are also given, and experimental data are presented for 2-bit encoder circuits operating at multigigahertz clock frequencies. HSPICE is used for all Monte Carlo simulations and the Josephson junction model is given in the Appendix. © 1998 IEEE.
dc.description.versionArticle
dc.identifier.citationIEEE Transactions on Applied Superconductivity
dc.identifier.citation8
dc.identifier.citation3
dc.identifier.issn10518223
dc.identifier.urihttp://hdl.handle.net/10019.1/12125
dc.subjectComputer simulation
dc.subjectIntegrated circuit testing
dc.subjectLogic circuits
dc.subjectLogic design
dc.subjectMonte Carlo methods
dc.subjectOptimization
dc.subjectTiming circuits
dc.subjectComplementary output switching logic (COSL)
dc.subjectMultivariable threshold logic (MVTL) circuits
dc.subjectSoftware package HSPICE
dc.subjectSuperconducting integrated circuits
dc.subjectSuperconducting devices
dc.titleMonte Carlo optimization of superconducting complementary output switching logic circuits
dc.typeArticle
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