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The design and implementation of a video compression development board

dc.contributor.advisorSmit, W.en_ZA
dc.contributor.authorAlalait, Sulimanen_ZA
dc.contributor.otherUniversity of Stellenbosch. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.en_ZA
dc.date.accessioned2011-02-28T08:51:35Zen_ZA
dc.date.accessioned2011-03-14T08:17:57Z
dc.date.available2011-02-28T08:51:35Zen_ZA
dc.date.available2011-03-14T08:17:57Z
dc.date.issued2011-03en_ZA
dc.identifier.urihttp://hdl.handle.net/10019.1/6547
dc.descriptionThesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2011.en_ZA
dc.description.abstractThis thesis describes the design and implementation of a video compression development board as a standalone embedded system. The board can capture images, encode them and stream out a video to a destination over a wireless link. This project was done to allow users to test and develop video compression encoders that are designed for UAV applications. The board was designed to use an ADSP-BF533 Blackfin DSP from Analog Devices with the purpose of encoding images, which were captured by a camera module and then streamed out a video through a WiFi module. Moreover, an FPGA that has an interface to a logic analyzer, the DSP, the camera and the WiFi module, was added to accommodate other future uses, and to allow for the debugging of the board. The board was tested by loading a H.264 BP/MP encoder from Analog Devices to the DSP, where the DSP was integrated with the camera and the WiFi module. The test was successful and the board was able to encode a 2 MegaPixel picture at about 2 frames per second with a data rate of 186 Kbps. However, as the frame rate was only 2 frames per second, the video was somewhat jerky. It was found that the encoding time is a system limitation and that it has to be improved in order to increase the frame rate. A proposed solution involves dividing the captured picture into smaller segments and encoding each segment in parallel. Thereafter, the segments can be packed and streamed out. Further performance issues about the proposed structure are presented in the thesis.en_ZA
dc.format.extent136 p. : ill.
dc.language.isoen_ZAen_ZA
dc.publisherStellenbosch : University of Stellenboschen_ZA
dc.subjectVideo compression development boarden_ZA
dc.subjectUnmanned Aerial Vehicle (UAV) applicationsen_ZA
dc.subjectImage encodingen_ZA
dc.subjectField Programmable Gate Arrays (FPGA)en_ZA
dc.subjectDissertations -- Electronic engineeringen_ZA
dc.subjectTheses -- Electronic engineeringen_ZA
dc.titleThe design and implementation of a video compression development boarden_ZA
dc.typeThesisen_ZA
dc.rights.holderUniversity of Stellenbosch


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