The design of a CMOS sensor camera system for a nanosatellite
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.
This thesis relates to the design of a camera system for a nanosatellite based on a CMOS image sensor. The design specifications and constraints are considered followed by the proposal of a versatile design with all the required functions imple- mented on a single FPGA. These functions include bad block management, data routing, an EDAC, a soft-core processor, glue logic to external devices, and com- munication busses. The Altera Nios II soft-core processor is implemented in this design, which en- ables simple changes to be made in software. A good mixture of intellectual prop- erty soft-cores, open-source cores, and user created logic are utilised in this broad base design, containing a combination of hardware, digital logic, and software. Low power and compact devices are selected for this design to minimize the power usage and the physical size of the camera system. The system's peak power consumption is 952mW which is below the required maximum consumption of 1W. This design's performance is therefore ideal for a subsystem onboard a nanosatel- lite.