Radiation tolerant implementation of a soft-core processor for space applications
Date
2007-03
Authors
Van der Horst, Johannes Gerhardus
Journal Title
Journal ISSN
Volume Title
Publisher
Stellenbosch : University of Stellenbosch
Abstract
The availability of high density FPGAs has made the use of soft-core processors an attractive
proposition for the low volume space market. Soft-core processors combine
the power of programmable logic with the ease of use of a conventional processor to
provide a highly customisable solution. However, the SRAM FPGAs used as implementation
platform are especially susceptable to radiation induced single event upsets,
due to the sensitivity of their configuration memory. To safely use these processors in
a space environment requires the modification of the processor to safely mitigate these
effects.
This thesis presents the process followed to develop and test a fault tolerant implementation
of an 8-bit PicoBlaze soft-core processor on a Xilinx Spartan-3 SRAM FPGA.
A thorough investigation was made into the available methods that can be used to
mitigate single event upsets, in order to identify the most suitable ones. Guidelines
for the application of SEU mitigation techniques to SRAM FPGAs were proposed. A
single event upset simulator was designed and constructed to compare the different
techniques. It mimics SEUs by injecting errors into the configuration memory of an
FPGA.
The results of error injection were used to develop a PicoBlaze implementation with
limited overhead, while it still offers a high degree of error mitigation.
Three different designs were tested by proton irradiation to verify the protection afforded
by the mitigation techniques. It was found that protected designs were more
robust. The cross-section of the FPGA was also determined, which can be used with
the SEU simulator to predict the dynamic cross-section of designs.
The work contained in this thesis demonstrates the use of open-source intellectual
property with commercial-off-the-shelf components to develop a robust component for
use in the miniature spacecraft market.
Description
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2007.
Keywords
Field programmable gate arrays, Microprocessors, Dissertations -- Electronic engineering, Theses -- Electronic engineering