Parameter extraction of superconducting integrated circuits
Date
2006-12
Authors
Lotter, Pierre
Journal Title
Journal ISSN
Volume Title
Publisher
Stellenbosch : University of Stellenbosch
Abstract
Integrated circuits are expensive to manufacture and it is important to verify the correct
operation of a circuit before fabrication. Efficient, though accurate, parameter extraction
of post-layout designs are required for estimation of circuit success rates. This thesis
discusses electrical netlist and fast parameter extraction techniques suited for both intraand
inter-gate connections. This includes the use of extraction windows and look-up tables
(LUTs) for accurate inductance and capacitance estimation. These techniques can readily
be implemented in automated layout software where fast parameter extraction is required
for timing analysis and gate placement.
Description
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.
Keywords
Superconductivity, Dissertations -- Electronic engineering, Theses -- Electronic engineering