Natural balancing of neutral-point-clamped converters under POD pulsewidth modulation
The three-level Neutral-Point-Clamped(NPC) converter, being a widely used multilevel inverter, received a lot of attention recently due to problems associated with de-link capacitor voltage balancing. There are mainly two problems associated with the neutral-point voltage of the NPC inverter: 1) At high modulation indices a low frequency ripple occurs on the neutral-point voltage. 2) Steady-state unbalance in the neutral-point voltage may arise due to a variety of factors including component imperfections, transients and other non-idealities and imbalances. In this paper we study the balancing problem with focus on the steady-state unbalance. This is achieved by a systematic and mathematically rigorous study of the natural balancing mechanisms of the three-level three-phase NPC inverter. Orthogonality of two sets of switching spectra in the frequency domain would imply that the DC-bus voltages balance in the steady state. This is done through mathematical analysis using Carrara's PWM strategy of Phase Opposition Disposition(POD) and Bennet's geometric model for double fourier series adapted for use with power converter systems by Bowes. The theory is verified through simulation.