A multilevel inverter for DC reticulation

Molepo, Seaga Abram (2003-03)

Thesis (MScEng)--Stellenbosch University, 2003.


ENGLISH ABSTRACT: This report presents the design and development of a multilevel inverter for DC reticulation. Two main multilevel inverter topologies are introduced and discussed. The research focusses on the flying capacitor multilevel topology, since it became evident that it is more suitable for DC reticulation than the diode clamped multilevel topology. A bootstrap power supply for the gate drive circuits of a multilevel inverter is developed and its feasibility verified experimentally. A self-starting auxiliary power supply, that aims at addressing the power supply problem of DC to AC and DC to DC converters, is designed and its functionality demonstrated on a flying capacitor multilevel inverter. An FPGA based digital controller for implementing the inverter's control algorithms is also discussed. This controller incorporates a feed-forward output voltage regulation technique. Experimental results obtained with the four-level flying capacitor multilevel inverter, using the FPGA based digital controller and the self-starting auxiliary power supply, are presented in this report.

AFRIKAANSE OPSOMMING: In hierdie verslag word die ontwerp en ontwikkelling van 'n multivlak omsetter vir GS retikulasie bespreek. Twee hoof multivlak omsetter topologië word voorgestel en bespreek. Die navorsing fokus op die "vlieënde-kapasitor" multivlak topologië omdat dit duidelik geword het dat dit 'n beter opsie is vir die GS retikulasie as die diode-klamp multivlak topologië. 'n Kragbron vir die hekaandryfbane van die multivlak omsetter is ontwikkel en die werking daarvan is met experimentele toetse bevestig. 'n Self-begin kragbron, wat die probleem van die kragtoevoer aan die GS na WS en die GS na GS omsetters aanspreek, is ontwerp en die funksionaliteit is gedemonstreer met die "vlieënde-kapasitor" multivlak . omsetter. 'n Digitale beheerder, gebaseer op 'n FPGA, wat gebruik word om die omsetter se beheer algoritmes te implementeer, word ook bespreek. Hierdie beheerder inkorporeer 'n vorentoe-voer uittree spannings regulasie tegniek. Eksperimentele resultate wat gekry is met 'n vier-vlak "vlieënde-kapasitor" multivlak omsetter, wat van die FPGA gebaseerde digitale beheerder en die self-begin kragbron gebruik maak, word ook in die verslag bespreek.

Please refer to this item in SUNScholar by using the following persistent URL: http://hdl.handle.net/10019.1/53253
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