Aspects of low phase noise impulse generator designs for subsampling phase-locked loops
Date
2022-04
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
Stellenbosch : Stellenbosch University
Abstract
ENGLISH ABSTRACT: The sub-sampling phase locked loop (SSPLL) is a variant of the traditional
phase locked loop (PLL) that relies on sampling a high frequency output signal
to compare with a low frequency, low phase noise reference signal. Central
to the SSPLL system is an impulse generator, which drives the sampling of
the output signal. Step Recovery Diodes (SRDs) and Non-linear Transmission
Lines (NLTLs) have been used in impulse generators for SSPLL systems. Both
these approaches to impulse generation can introduce new sources of phase
noise. This thesis aims to discover the primary sources of phase noise in both
SRD- and NLTL-based impulse generators in order to improve the overall
phase noise of the output of the SSPLL frequency synthesiser. To this end, this
thesis will investigate the theory of operation and modelling of both the SRD
and the NLTL circuit components. Impulse generator circuits based on these
components will be described, and literature on noise susceptibility of these
circuits will be presented. Finally, a case study is put forward to demonstrate
the theory. It was found that SRD impulse generators are susceptible to shot
noise due to the high currents needed to drive SRDs, as well as AM/PM
conversion noise when poorly matched. NLTL impulse generators, on the other
hand, were found to generate less additional phase noise, but are also limited
in their power handling capabilities. In many cases, NLTL based impulse
generators will allow for reduced phase noise in frequency synthesis.
AFRIKAANSE OPSOMMING: Geen opsomming beskikbaar
AFRIKAANSE OPSOMMING: Geen opsomming beskikbaar
Description
Thesis (MEng)--Stellenbosch University, 2022.
Keywords
UCTD, Phase-locked loops, Sub-sampling phase locked loop, Step Recovery Diodes, Electric generators -- Designs