A mass memory system for satellites using field programmable gate arrays and synchronous DRAM

Vosloo, Jacobus Jurie (2006-12)

Thesis (MScIng) -- University of Stellenbosch, 2006.

Thesis

ENGLISH ABSTRACT: Technological advances have increased storage requirements on board satellites tremendously in recent years. Storage normally used on satellites is expensive and often complex and rigid hardware systems are needed to access the large number of interconnected devices effectively. This thesis looks at the lower cost higher volume alternative of Synchronous DRAM, coupled with the flexibility of reprogrammable logic. A VHDL design of the system is done using a narrow data bus and no address bus and includes SDRAM control, reducing external components. Suggestions are also made to reduce the inherent risk associated with the technologies used to implement the design.

AFRIKAANSE OPSOMMING: Onlangse tegnologiese vooruitgang het stoorvereistes op satelliete drasties verhoog. Geheue wat gewoonlik in satelliete gebruik word is duur en komplekse en rigiede hardeware stelsels word dikwels benodig om effektiewe toegang tot die groot aantal eenhede te verkry. Hierdie tesis ondersoek die laer koste, hoer volume alternatief van Sinchrone DRAM, saam met die buigsaamheid van herprogrammeerbare logika. 'n VHDL-ontwerp van die stelsel is gedoen wat 'n smal databus, maar geen adresbus gebruik nie en SDRAM beheer insluit, wat dan eksterne komponente verminder. Aanbevelings word ook gemaak oor hoe om die inherente risiko's wat met die implementeringstegnologiee gepaardgaan te verminder.

Please refer to this item in SUNScholar by using the following persistent URL: http://hdl.handle.net/10019.1/50558
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