The experimental design and characterisation of Doherty power amplifiers
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.
Modern day digital modulation techniques in communication systems produce large peak-to-average ratios. To maintain linearity, power amplifiers have to operate at backed-off levels. This results in low efficiency with consequences such as high power consumption, short battery life and excessive heat in power amplifiers. A Doherty amplifier is an efficiency enhancement technique which increases an amplifier’s efficiency at backed-off levels. This thesis presents a design procedure for a Classical Doherty amplifier. A method where Sparameter measurements from a transistor are used to predict the transistor’s transmission phase response for varying input power is presented. This method is found to be accurate by comparing it to measurements done on a non-linear network analyser. The measured S-parameters are also used to design the Doherty amplifier at its predicted peak output power. Two Classical Doherty amplifiers are designed, manufactured and characterised. The measurements are performed on a custom measurement setup using in-house developed Matlab code to automate the measurements. The first Doherty amplifier used small-signal Siemens CFY30 GaAs FETs and the second Doherty amplifier used 10W Motorola MRF282 LDMOS transistors. The performance of both amplifiers is compared to similar balanced amplifiers and shows improvements in their efficiency. The improvement in efficiency for the 10W Doherty power amplifier in relation to a balanced amplifier is compared to results found in the literature and a good correspondence between the measured and published results were obtained.