ENGLISH ABSTRACT: The Solid-State Transformer (SST) is presented as an alternative to the traditional Line-Frequency
Transformer (LFT) used for voltage-level transformation in distribution grids. The LFT technology
is highly matured which results in low costs and high efficiency. The SST however, introduces
several advantages compared to the LFT, some of which are input unity power-factor,
near perfect output-voltage regulation, frequency variation as well as harmonic filtering.
The SST consists of three power-electronic converter stages: The input stage, the isolation
stage and the output stage. The input and isolation stages are implemented with a multilevelconverter
topology incorporating a converter-stack for each phase. Each stack consists of N
converter building blocks, called cells. In this thesis the design and implementation of the main
controller is presented. The main controller, together with N cell controllers, is responsible for
the control of the cells within the respective stack. Three main controllers are thus implemented
within the SST.
Each cell consists of an Active Rectifier (AR) and a DC-DC Converter (DC-DC). The SST
control design thus starts with the AR control which is subsequently expanded to Cascaded
Active-Rectifier (CAR) control. Design is completed with the addition of the DC-DC control.
Time domain simulations of the AR- and CAR-control are presented and discussed. Test measurements,
verifying functionality of each control design-phase, are presented and discussed.
AFRIKAANSE OPSOMMING: Die Drywingselektroniese Transformator (DET) word voorgestel as ’n alternatief vir die Lyn
Frekwensie Transformator (LFT) wat gebruik word vir spannings-vlak tranformasie op distribusie
vlak. The LFT tegnologie is ver gevorderd wat ly tot hoë effektiwiteit en lae kostes.
The DET bied wel voordele soos intree eenheids arbeid faktor, na aan perfecte uittree-spannings
regulasie, frequensie variasie sovel as harmoniese filrteering.
Die DET bestaan uit drie drywingselektroniese omsetter stadiums: Die intree-stadium, die
isolasie-stadium en die uittree-stadium. The intree- en isolasie-stadiums word geïmplimenteer
met ’n multivlak-omsetter topologie wat bestaan uit ’n omsetter-stapel vir elke fase. Elke stapel
bestaan uit N omsetter boustene wat selle genoem word. In hierdie tesis word the ontwerp
en implementasie van die hoofbeheerder voorgestel. Die hoofbeheerder, tesame met N selbeheerders,
is verantwoordelik vir die beheer van elke sel in die spesifieke stapel. In die DET
word daar dus drie hoofbeheerders gebruik.
Elke sel bestaan uit ’n Aktiewe Gelykrigter (AG) en ’n GS-GS omsetter (GS-GS). Die DET
beheerontwerp begin dus met die (AG) beheer wat daarna uitgebrei word na Kaskade Aktiewe
Gelykrigter (KAG) beheer. Die beheer ontwerp word voltooi deur die byvoeging van die GSGS
beheer. Tyd-gebied simulasies van die AG- en KAG-beheer word voorgelê en bespreek.
Toetsmetings wat die funksionaliteit van elke beheer ontwepsfase verifeer, word voorgelê.
